As one of three partners representing the Czech component within Productive 4.0, the Institute of Information Theory and Automation (UTIA) released an evaluation package including application note of a newly enhanced design flow modelled to meet the requirements of innovative IoT-enabling components.
According to Dr. Jiří Kadlec who is a main staff member of the public research institute, a high level flow identified as Xilinx SDSoC is now enabling to accelerate selected critical C/C++ functions in the SW code into the programmable part of the 28nm Zynq device on an industrial HW module.
“The implemented support for the PetaLinux OS and the 1G Ethernet connectivity is the basis for the future integration of these industrial HW modules to the Arrowhead SW architecture developed in the frame of the Productive 4.0 project”, Kadlec says.
The optimized design flow will be used for the automated generation of IIoT computing nodes with the standardized on-chip data-mover networks and related standardized APIs for the SW of the MP SoC. It will serve for industrial automation, local data processing and data communication.
In other words: The latest UTIA development, small enough to fit in a little box, stands for the specific approach of work package 3 to furnish the industry with new hard- and software technologies. It is a step ahead towards making products and processes a lot more traceable and controllable. It is all about linking things and objects in the context of the Industrial Internet of Things (IIoT).